Taylor Expansion Diagrams: A Canonical Representation for Verification of Data Flow Designs

CIESIELSKI, KALLA, ZENG: TAYLOR EXPANSIONDIAGRAMS: A COMPACT CANONICAL REPRESENTATIONFOR ARITHMETIC EXPRESSIONS 1 Taylor Expansion Diagrams: A Compact Canonical Representation for Arithmetic Expressions

This paper presents a new, compact, canonical representation for arithmetic expressions, called Taylor Expansion Diagram. It can be used to facilitate the verification of RTL specifications and hardware implementations of arithmetic designs, and specifically the equivalence checking of complex algebraic and arithmetic expressions that arise in symbolic verification. This new representation is b...

Taylor Expansion for the Entropy Rate of Hidden Markov Chains

We study the entropy rate of a hidden Markov process, defined by observing the output of a symmetric channel whose input is a first order Markov process. Although this definition is very simple, obtaining the exact amount of entropy rate in calculation is an open problem. We introduce some probability matrices based on Markov chain's and channel's parameters. Then, we try to obtain an estimate ...

Canonical representation for approximating solution of fuzzy polynomial equations

In this paper, the concept of canonical representation is proposed to find fuzzy roots of fuzzy polynomial equations. We transform fuzzy polynomial equations to system of crisp polynomial equations, this transformation is perform by using canonical representation based on three parameters Value, Ambiguity and Fuzziness. 

A Graph-Based Method for Timing Diagrams Representation and Verification

p. 1 A Petri Net Approach for the Analysis of VHDL Descriptions p. 15 Temporal Analysis of Time Bounded Digital Systems p. 27 Strongly-Typed Theory of Structures and Behaviours p. 39 Verification and Diagnosis of Digital Systems by Ternary Reasoning p. 55 Logic Verification of Incomplete Functions and Design Error Location p. 68 A Methodology for System-Level Design for Verifiability p. 80 Alge...

Formal Verification of Condition Data Flow Diagrams for Assurance of Correct Network Protocols